# Essay about Constructing a Logic Processor in VHDL that Executes Various Bit-Serial Logic Operands On 8-Bit Operands

Submitted By simmi_singh
Words: 664
Pages: 3

Objective
The objective of this experiment was to construct a logic processor in VHDL that executes various bit-serial logic operands on 8-bit operands. Lab notebook contains the code for a 4-bit processor. So, we can just modify it for 8-bits.

Circuit Operation In lab 6 we did TTL circuit that is very similar to this circuit. If it was hardware in lab 6, in this we will use VHDL software to design it. The design of circuit is that it take s values are loaded from switches, then through routing unit it takes itself, or swapped or loaded with some computation including two registers , A and B. These operations are bitwise computations performing OR, XOR, AND, NAND, NOR, XNOR or sets to 0, 1. All these values appear on hex displays on board.

Entity Description

Reg 8
This is exactly the same as in previous lab 7. The purpose of this circuit is to store 8 bit values and can shift values. This circuit works based on Load A and Load B switch. Whenever Load A or Load B is high, values will be stored in these register, otherwise when Load A or Load B are low, the values remain the same.

Register Unit
The purpose of this unit is to load registers A, B depending on values of Load A or
Load B. After this process these values are go to the computation unit.

Computation Unit The computation unit until will accept as inputs the contents of RegA and RegB, and the function selection inputs F2, F1, F0. The unit will output the logical function f(A, B) specified by and will also output the A and B inputs unchanged. The three outputs will be fed to the Routing Unit. Function Selection Inputs Computation Unit Output
F F F f(A, B)
0 0 0 A AND B
0 0 1 A OR B
0 1 0 A XOR B
0 1 1 1111
1 0 0 A NAND B
1 0 1 A NOR B
1 1 0 A XNOR B
1 1 1 0000

Routing Unit The routing unit will accept the A, B, and f(A, B) inputs and, based on the routing selection inputs R1, R0, will determine which signals to feed to the A’(new A) and B’(new B) outputs.
Routing Selection Router Output
R R A’ B’
0 0 A B
0 1 A F
1 0 F B
1 1 B A

Hexdriver
The Hexdriver is designed for the 7 segment display on the board. The displays are controlled by the 4 bits of data it receives. Each of the hexdriver will convert the 4 bits into 7 bits for the 7 segment display.

Control Unit
The control unit controls the overall states and state transitions of the circuit. In this lab, there are states A – J where A is the starting state. Once the