Mips: Mips Architecture and Mips Instruction Reference Essay

Submitted By nileshk1
Words: 479
Pages: 2

11/17/13

MIPS Instruction Reference

MIPS Instruction Reference
This is a description of the MIPS instruction set, their meanings, syntax, semantics, and bit encodings. The syntax given for each instruction refers to the assembly language syntax supported by the MIPS assembler.
Hyphens in the encoding indicate "don't care" bits which are not considered when an instruction is being decoded. General purpose registers (GPRs) are indicated with a dollar sign ($). The words SWORD and UWORD refer to 32-­bit signed and 32-­bit unsigned data types, respectively.
The manner in which the processor executes an instruction and advances its program counters is as follows:
1. execute the instruction at PC
2. copy nPC to PC
3. add 4 or the branch offset to nPC
This behavior is indicated in the instruction specifications below. For brevity, the function advance_pc (int) is used in many of the instruction descriptions. This function is defined as follows: void advance_pc (SWORD offset)
{
PC = nPC;; nPC += offset;;
}

Note: ALL arithmetic immediate values are sign-­extended. After that, they are handled as signed or unsigned 32 bit numbers, depending upon the instruction. The only difference between signed and unsigned instructions is that signed instructions can generate an overflow exception and unsigned instructions can not.
The instruction descriptions are given below:

ADD – Add (with overflow)
Description:
Operation:
Syntax:
Encoding:

Adds two registers and stores the result in a register
$d = $s + $t;; advance_pc (4);; add $d, $s, $t
0000 00ss ssst tttt dddd d000 0010 0000

ADDI -­-­ Add immediate (with overflow)
Description: Adds a register and a sign-­extended immediate value and stores the result in a register
Operation: $t = $s + imm;; advance_pc (4);;
Syntax:
Encoding:

addi $t, $s, imm
0010 00ss ssst tttt iiii iiii iiii iiii

ADDIU -­-­ Add immediate unsigned (no overflow) www.mrc.uidaho.edu/mrc/people/jff/digital/MIPSir.html 1/9

11/17/13

MIPS Instruction Reference

Description: Adds a register and a sign-­extended