Design and Testing
As mentioned above, the implementation of the 1D cellular automaton was completed in hardware and no software was designed. We used the Altera DE2 development board and the Cyclone II E2C35 FPGA. Since each cell of a new generation of the 1D cellular automaton is calculated by three cells from the previous generation and we wanted to generate the cellular automaton with hardware, a state machine running at 27Mhz was implemented to read from the memory, generate the new cell and store it back into memory. We also implemented a separate VGA interface that fed the VGA output with data and sync signals.
All cellular automaton data was stored in M4K memory…